Arria V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683213
Date 7/24/2020
Public
Document Table of Contents

2.5. Embedded Memory Clocking Modes

This section describes the clocking modes for the Arria® V memory blocks.

CAUTION:
To avoid corrupting the memory contents, do not violate the setup or hold time on any of the memory block input registers during read or write operations.

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