Intel® Quartus® Prime Standard Edition User Guide: Third-party Synthesis

ID 683796
Date 9/24/2018
Public
Document Table of Contents

2.7.1. Obtaining Accurate Logic Utilization and Timing Analysis Reports

Historically, designers have relied on post-synthesis logic utilization and timing reports to determine the amount of logic their design requires, the size of the device required, and how fast the design runs. However, today’s FPGA devices provide a wide variety of advanced features in addition to basic registers and look-up tables (LUTs). The Intel® Quartus® Prime software has advanced algorithms to take advantage of these features, as well as optimization techniques to increase performance and reduce the amount of logic required for a given design. In addition, designs can contain black boxes and functions that take advantage of specific device features. Because of these advances, synthesis tool reports provide post‑synthesis area and timing estimates, but you should use the place-and-route software to obtain final logic utilization and timing reports.

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