Intel® Quartus® Prime Standard Edition User Guide: Third-party Synthesis

ID 683796
Date 9/24/2018
Public
Document Table of Contents

1.9. Synplify Optimization Strategies

Combining Synplify software constraints with VHDL and Verilog HDL coding techniques and Intel® Quartus® Prime software options can help you obtain the results that you require.

For more information about applying attributes, refer to the Synopsys FPGA Synthesis Reference Manual.

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