Intel® Quartus® Prime Standard Edition User Guide: Third-party Synthesis

ID 683796
Date 9/24/2018
Document Table of Contents Creating a Intel® Quartus® Prime Project for Compile Points and Multiple .vqm Files

During compilation, the Synplify Pro and Premier software creates a <top-level project>.tcl file that provides the Intel® Quartus® Prime software with the appropriate constraints and design partition assignments, creating a partition for each .vqm file along with the information to set up a Intel® Quartus® Prime project.

Depending on your design methodology, you can create one Intel® Quartus® Prime project for all netlists or a separate Intel® Quartus® Prime project for each netlist. In the standard incremental compilation design flow, you create design partition assignments and optional LogicLock floorplan location assignments for each partition in the design within a single Intel® Quartus® Prime project. This methodology allows for the best quality of results and performance preservation during incremental changes to your design.

You might require a bottom-up design flow if each partition must be optimized separately, such as for third-party IP delivery. If you use this flow, Intel recommends you create a design floorplan to avoid placement conflicts between each partition. To follow this design flow in the Intel® Quartus® Prime software, create separate Intel® Quartus® Prime projects, export each design partition and incorporate them into a top‑level design using the incremental compilation features to maintain placement results.