- 2.8.2. Running the Intel® Quartus® Prime Software Manually Using the Precision Synthesis‑Generated Tcl Script
- 188.8.131.52. Creating a Single Intel® Quartus® Prime Project for a Standard Incremental Compilation Flow
1.3. Hardware Description Language Support
The HDL Analyst that is included in the Synplify software is a graphical tool for generating schematic views of the technology-independent RTL view netlist (.srs) and technology-view netlist (.srm) files. You can use the Synplify HDL Analyst to analyze and debug your design visually. The HDL Analyst supports cross-probing between the RTL and Technology views, the HDL source code, the Finite State Machine (FSM) viewer, and between the technology view and the timing report file in the Intel® Quartus® Prime software. A separate license file is required to enable the HDL Analyst in the Synplify software. The Synplify Pro and Premier software include the HDL Analyst.
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