- 2.8.2. Running the Intel® Quartus® Prime Software Manually Using the Precision Synthesis‑Generated Tcl Script
- 22.214.171.124. Creating a Single Intel® Quartus® Prime Project for a Standard Incremental Compilation Flow
126.96.36.199. Multiplier-Accumulators and Multiplier-Adders
The Precision Synthesis software detects multiply-accumulators or multiply‑adders in HDL code and infers an ALTMULT_ACCUM or ALTMULT_ADD IP cores so that the logic can be placed in DSP blocks, or the software maps these functions directly to device atoms to implement the multiplier in the appropriate type of logic.
For more information about DSP blocks in Intel devices, refer to the appropriate Intel device family handbook and device-specific documentation. For details about which functions a given DSP block can implement, refer to the DSP Solutions Center on the Intel website.
For more information about inferring multiply-accumulator and multiply‑adder IP cores in HDL code, refer to the Intel Recommended HDL Coding Styles and the Mentor Graphics Precision Synthesis Style Guide.
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