Stratix V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683665
Date 11/23/2021
Public
Document Table of Contents

4.1.7.4. PCLK Control Block

To drive the HSSI horizontal PCLK control block, select the HSSI output or internal logic .

To drive the DPA horizontal PCLK, select the DPA clock output or internal logic. You can only use the DPA clock output to generate the vertical PCLK to the core.

Figure 61. Horizontal PCLK Control Block for Stratix V Devices


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