Stratix® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683665
Date 10/18/2023
Public
Document Table of Contents

6.4. Differential Receiver in Stratix V Devices

The receiver has a differential buffer and fractional PLLs that you can share among the transmitter and receiver, a DPA block, a synchronizer, a data realignment block, and a deserializer. The differential buffer can receive LVDS, mini-LVDS, and RSDS signal levels. You can statically set the I/O standard of the receiver pins to LVDS, mini-LVDS, or RSDS in the Intel® Quartus® Prime software Assignment Editor.

Note: To drive the LVDS channels, you must use the PLLs in integer PLL mode.