Stratix® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683665
Date 10/18/2023
Document Table of Contents

10.2. I/O Voltage for JTAG Operation

A Stratix V device operating in BST mode uses four required JTAG pins—TDI, TDO, TMS, TCK, and one optional pin, TRST.

The TCK pin has an internal weak pull-down resistor, while the TDI and TMS pins have internal weak pull-up resistors. The 3.0- or 2.5-V VCCPD supply of I/O bank 3A powers the TDO, TDI, TMS, and TCK pins. All user I/O pins are tri-stated during JTAG configuration.

The JTAG chain supports several different devices. Use the supported TDO and TDI voltage combinations listed in the following table if the JTAG chain contains devices that have different VCCIO levels. The output voltage level of the TDO pin must meet the specification of the TDI pin it drives.

Table 99.  Supported TDO and TDI Voltage CombinationsThe TDO output buffer for VCCPD of 3.0 V meets VOH (MIN) of 2.4 V, and the TDO output buffer for VCCPD of 2.5 V meets VOH (MIN) of 2.0 V.
Device TDI Input Buffer Power (V) Stratix V TDO VCCPD
VCCPD = 3.0 V VCCPD = 2.5 V
Stratix V VCCPD = 3.0 V Yes Yes
VCCPD = 2.5 V Yes Yes
Non-Stratix V 25 VCC = 3.3 V Yes Yes
VCC = 2.5 V Yes Yes
VCC = 1.8 V Yes Yes
VCC = 1.5 V Yes Yes
25 The input buffer must be tolerant to the TDO VCCPD voltage.