Stratix V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683665
Date 11/23/2021
Document Table of Contents

7.3.10. Delay Chains

The Stratix® V devices contain run-time adjustable delay chains in the I/O blocks and the DQS logic blocks. You can control the delay chain setting through the I/O or the DQS configuration block output.

Figure 158. Delay Chain

Every I/O block contains two delay chains between the following elements:

  • The output registers and output buffer (in series)
  • The input buffer and input register
  • The output enable and output buffer
  • The R T OCT enable-control register and output buffer
Figure 159. Delay Chains in an I/O Block

Each DQS logic block contains a delay chain after the dqsbusout output and another delay chain before the dqsenable input.

Figure 160. Delay Chains in the DQS Input Path

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