7.3.10. Delay Chains
The Stratix® V devices contain run-time adjustable delay chains in the I/O blocks and the DQS logic blocks. You can control the delay chain setting through the I/O or the DQS configuration block output.
Every I/O block contains two delay chains between the following elements:
- The output registers and output buffer (in series)
- The input buffer and input register
- The output enable and output buffer
- The R T OCT enable-control register and output buffer
Each DQS logic block contains a delay chain after the dqsbusout output and another delay chain before the dqsenable input.