Stratix® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683665
Date 10/18/2023
Document Table of Contents

10.4. Enabling and Disabling IEEE Std. 1149.1 BST Circuitry

The IEEE Std. 1149.1 BST circuitry is enabled after the Stratix® V device powers up.

To ensure that you do not inadvertently enable the IEEE Std. 1149.1 circuitry when it is not required, disable the circuitry permanently with pin connections as listed in the following table.

Table 100.  Pin Connections to Permanently Disable the IEEE Std. 1149.1 Circuitry for Stratix V Devices
JTAG Pins26 Connection for Disabling
TMS VCCPD supply of Bank 3A
TDI VCCPD supply of Bank 3A
TDO Leave open
26 The JTAG pins are dedicated. Software option is not available to disable JTAG in Stratix® V devices.