Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 8/15/2024
Public
Document Table of Contents

2.2.6.1.2. Stratix 10 HPS SDRAM Adapter

The SDRAM adapter is responsible for bridging the hard memory controller in the FPGA portion of the device to the SDRAM scheduler. The adapter is also responsible for ECC generation and checking.