Stratix® 10 Hard Processor System Technical Reference Manual
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15.5.2.6. Pipeline Read-Ahead and Write-Ahead Operations
The NAND flash controller can handle at the most four outstanding pipeline commands, queued up in the order in which the flash controller received the commands. The flash controller operates on the pipeline command at the head of the queue until all the pages corresponding to the pipeline command are executed. The flash controller then pops the pipeline command at the head of the queue and proceeds to work on the next pipeline command in the queue.