Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 8/15/2024
Public
Document Table of Contents

15.5.2.5. Copy-Back Operations

The NAND flash controller supports copy back operations. However, the flash device might have limited support for this function. If you attempt to perform a copy‑back operation on a device that does not support copy‑back, the NAND flash controller triggers an interrupt. An interrupt is also triggered if the source block is not specified before the destination block is specified, or if the destination block is not specified in the next command following a source block specification.

The NAND flash controller cannot do ECC validation in case of copy‑back commands. The flash controller copies the ECC data, but does not check it during the copy operation.

Note: Intel recommends that you use copy‑back only if the ECC implemented in the flash controller is strong enough so that the next access can correct accumulated errors.

The 8‑bit value <PP> specifies the number of pages for copy‑back. With this feature, the NAND flash controller can copy multiple consecutive pages with a single command. When you issue a copy‑back command, the flash controller performs the operation in the background. The flash controller puts other commands on hold until the current copy‑back completes.

For a multi‑plane device, if the flag bit in the multiplane_operation register in the config group is set to 1, multi‑plane copy‑back is available as an option. In this case, the block address specified must be plane‑aligned and the value <PP> must specify the total number of pages to copy as a multiple of the number of planes. The block address continues incrementing, keeping the page address fixed, for the total number of planes in the device before incrementing the page address.

A pipe_cpyback_cmd_comp interrupt is generated when the flash controller has completed copy‑back operation of all <PP> pages. If any page program operation (as a part of copy back operation) results in a program failure in the device, the program_fail interrupt is issued. The failing page's block and page address is updated in the err_block_addr0 and err_page_addr0 registers in the status group.