Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 8/15/2024
Public
Document Table of Contents

15.4.6. Resets

The NAND flash controller has one external reset signal, nand_flash_rst_n, that resets it. Once a reset is initiated, access to the NAND flash controller should not be attempted until after 20 nand_clk cycles.

Note: The minimum reset time for the NAND flash controller is 10 nand_clk clock cycles.