Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 8/15/2024
Public
Document Table of Contents

B.4. Quad SPI Flash Controller Signal Description

The quad SPI controller provides four chip select outputs to allow control of up to four external quad SPI flash devices. The outputs serve different purposes depending on whether the device is used in single, dual, or quad operation mode. The following table lists the I/O pin use of the quad SPI controller interface signals for each operation mode.

Table 232.  Interface Pins
Pin Mode Direction Function
IO0

Single

Output

Data output 0

Dual or quad

Bidirectional

Data I/O 0

IO1

Single

Input

Data input 0

Dual or quad

Bidirectional

Data I/O 1

IO2_WPN

Single or dual

Output

Active low write protect

Quad

Bidirectional

Data I/O 2

IO3_HOLD

Single, dual, or quad

Bidirectional

Data I/O 3

SS0

Single, dual, or quad

Output

Active low slave select 0

SS1

Active low slave select 1

SS2

Active low slave select 2

SS3

Active low slave select 3

CLK

Single

Output

quad SPI serial clock output