Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 1/25/2024
Public
Document Table of Contents

9.2. On-Chip RAM Block Diagram and System Integration

Figure 32. On-Chip RAM Block Diagram
The on-chip RAM interfaces to the following:
  • Clock manager
  • Reset manager
  • System manager
  • CCU
  • L3 interconnect