Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 1/25/2024
Public
Document Table of Contents

4.6.1. Command Mapping

The CCU sends transactions to different locations depending on the ACE or ACE-lite command variant.
Table 47.  Read Command Mapping
Note: X values denote a don't care
ARSNOOP[3:0] ARDOMAIN[1:0] ARBAR[1:0] ACE/ ACE-Lite Transaction Type Target
4’b0000 2'b00, 2'b11 2'bX0 ReadNoSnoop Slave
4’b0000 2'b01, 2'b10 2'bX0 ReadOnce
  • From Cortex*-A53 MPCore processor: CCC
  • From ACE-lite masters: IOCB
4’b0001 2'b01, 2'b10 2'bX0 ReadShared
  • From Cortex*-A53 MPCore processor: CCC
  • From ACE-lite masters: IOCB
4’b0010 2'b01, 2'b10 2'bX0 ReadClean CCC
4’b0011 2'b01, 2'b10 2'bX0 ReadNotSharedDirty CCC
4’b0111 2'b01, 2'b10 2'bX0 ReadUnique CCC
4’b1011 2'b01, 2'b10 2'bX0 CleanUnique CCC
4’b1100 2'b01, 2'b10 2'bX0 MakeUnique CCC
4’b1000 2'b00, 2'b01, 2'b10 2'bX0 CleanShared CCC
4’b1001 2'b00, 2'b01, 2'b10 2'bX0 CleanInvalid CCC
4’b1101 2'b00, 2'b01, 2'b10 2'bX0 MakeInvalid CCC
4’b0000 2'b01, 2'b10 2'b01 Coherent Memory Bar
  • From ACE-lite or ACE-lite+DVM masters: IOCB
  • From ACE masters: local bridge in the coherency interconnect
4’b0000 2'b01, 2'b10 2'b11 Coherent Sync Bar local bridge
4’b0000 2'b00, 2'b11 2'bX1 Non-coherent Bar local bridge
4’b1110 2'b01, 2'b10 2'bX0 DVM Complete DVM
4’b1111 2'b01, 2'b10 2'bX0 DVM Message DVM
Table 48.  Write Command Mapping
Note: X values denote a don't care
AWSNOOP[2:0] AWDOMAIN[1:0] AWBAR[1:0] Transaction Type Target
3’b000 2'b00, 2'b11 2'bX0 WriteNoSnoop Slave
3’b000 2'b01, 2'b10 2'bX0 WriteUnique
  • From Cortex*-A53 MPCore processor: CCC
  • From ACE-lite masters: IOCB
3’b001 2'b01, 2'b10 2'bX0 WriteLineUnique
  • From Cortex*-A53 MPCore processor: CCC
  • From ACE-lite masters: IOCB
3’b010 2'b01, 2'b10 2'bX0 WriteClean CCC
3’b010 2'b00 2'bX0 Non-Share WriteClean CCC
3’b011 2'b01, 2'b10 2'bX0 WriteBack CCC
3’b011 2'b00 2'bX0 Non-Share WriteBack CCC
3’b100 2'b01, 2'b10 2'bX0 Evict CCC
3’b101 2'b01, 2'b10 2'bX0 WriteEvict CCC
3’b101 2'b00 2'bX0 Non-Share WriteEvict CCC
3’b000 2'b01, 2'b10 2'b01 Coherent Memory Bar
  • From ACE-lite or ACE-lite+DVM masters: IOCB
  • From ACE masters: local bridge in the coherency interconnect
3’b000 2'b01, 2'b10 2'b11 Coherent Sync Bar local bridge
3’b000 2'b00, 2'b11 2'bX1 Non-coherent Bar local bridge