Intel® Stratix® 10 Device Datasheet

Download
ID 683181
Date 1/12/2022
Public
Document Table of Contents

I/O Pin Leakage Current

Table 15.  I/O Pin Leakage Current for Intel® Stratix® 10 Devices
Symbol Description Condition Min Max Unit
II Input pin leakage VI = 0 V to VCCIOMAX –80 80 µA
II_3.3VIO Input pin leakage for 3.3 V I/O pin VI = 0 V to VCCIOMAX –2 2 µA
IOZ Tri-stated I/O pin leakage VO = 0 V to VCCIOMAX –80 80 µA

Did you find the information on this page useful?

Characters remaining:

Feedback Message