Intel® Stratix® 10 Device Datasheet

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ID 683181
Date 1/12/2022
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HPS Power Supply Operating Conditions

Table 14.  HPS Power Supply Operating Conditions for Intel® Stratix® 10 DevicesThis table lists the steady-state voltage and current values expected for Intel® Stratix® 10 system-on-a-chip (SoC) devices with Arm* -based hard processor system (HPS). Power supply ramps must all be strictly monotonic, without plateaus. Refer to Recommended Operating Conditions for Intel® Stratix® 10 Devices table for the steady-state voltage values expected from the FPGA portion of the Intel® Stratix® 10 SoC devices.
Symbol Description Condition Minimum Typical Maximum Unit
VCCL_HPS HPS core voltage and periphery circuitry power supply –E2L, –I2L, –E3X, –I3X 0.87 0.9 0.93 V
0.91 0.94 0.97 V
–E1V, –I1V, –E2V, –I2V, –E3V, –I3V 33 0.77 – 0.91 0.8 – 0.94 0.83 – 0.97 V
0.87 0.9 0.93 V
0.91 0.94 0.97 V
VCCPLLDIG_HPS HPS PLL digital power supply –E2L, –I2L, –E3X, –I3X 0.87 0.9 0.93 V
0.91 0.94 0.97 V
–E1V, –I1V, –E2V, –I2V, –E3V, –I3V 33 0.77 – 0.91 0.8 – 0.94 0.83 – 0.97 V
0.87 0.9 0.93 V
0.91 0.94 0.97 V
VCCPLL_HPS HPS PLL analog power supply 1.8 V 1.71 1.8 1.89 V
VCCIO_HPS HPS I/O buffers power supply 1.8 V 1.71 1.8 1.89 V
33 When using the V suffix devices, the use of Power Management Bus (PMBus*) voltage regulator dedicated to Intel® Stratix® 10 SmartVID devices is mandatory for VCC and VCCP. The PMBus* voltage regulator and Intel® Stratix® 10 SmartVID devices are connected via PMBus*. VCCL_HPS and VCCPLLDIG_HPS may be connected to the PMBus* voltage regulator or a fixed voltage.

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