Intel® Stratix® 10 Device Datasheet

ID 683181
Date 1/12/2022
Document Table of Contents

External Configuration Clock Source Requirements

Table 100.  External Configuration Clock Source (OSC_CLK_1) Clock Input Requirements
Description External Clock Source Min Typ Max Unit
Clock input frequency 165 Powered by VCCIO_SDM 25/100/125 MHz
Clock input jitter tolerance 2 %
Clock input duty cycle 45 50 55 %
165 The acceptable clock frequencies are 25 MHz, 100 MHz, and 125 MHz only. You must match the external configuration clock frequency on the OSC_CLK_1 pin to the configuration clock source assignment in the Intel® Quartus® Prime software. Other frequencies in the range are not supported.

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