Intel® Stratix® 10 Device Datasheet

ID 683181
Date 1/12/2022
Public
Download
Document Table of Contents

Single-Ended SSTL, HSTL, and HSUL I/O Reference Voltage Specifications

Table 22.  Single-Ended SSTL, HSTL, and HSUL I/O Reference Voltage Specifications for Intel® Stratix® 10 Devices
I/O Standard VCCIO (V) VREF (V) VTT (V)
Min Typ Max Min Typ Max Min Typ Max
SSTL-18 
Class I, II 1.71 1.8 1.89 0.833 0.9 0.969 VREF - 0.04 VREF VREF + 0.04
SSTL-15 
Class I, II 1.425 1.5 1.575 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO
SSTL-135 1.283 1.35 1.45 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO
SSTL-125 1.19 1.25 1.31 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO
SSTL-12 1.14 1.2 1.26 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO
HSTL-18 
Class I, II 1.71 1.8 1.89 0.85 0.9 0.95 VCCIO/2
HSTL-15 
Class I, II 1.425 1.5 1.575 0.68 0.75 0.9 VCCIO/2
HSTL-12 
Class I, II 1.14 1.2 1.26 0.47 × VCCIO 0.5 × VCCIO 0.53 × VCCIO VCCIO/2
HSUL-12 1.14 1.2 1.3 0.49 × VCCIO 0.5 × VCCIO 0.51 × VCCIO
POD12 1.14 1.2 1.26 Internally calibrated VCCIO

Did you find the information on this page useful?

Characters remaining:

Feedback Message