Intel® Stratix® 10 Device Datasheet

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ID 683181
Date 1/12/2022
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DPA Lock Time Specifications

Table 37.  DPA Lock Time Specifications for Intel® Stratix® 10 DevicesThe DPA lock time is for one channel. One data transition is defined as a 0-to-1 or 1-to-0 transition.
Standard Training Pattern Number of Data Transitions in One Repetition of the Training Pattern Number of Repetitions per 256 Data Transitions  71 Maximum Data Transition 72
SPI-4 00000000001111111111 2 128 768
Parallel Rapid I/O 00001111 2 128 768
10010000 4 64 768
Miscellaneous 10101010 8 32 768
01010101 8 32 768
71 This is the number of repetitions for the stated training pattern to achieve the 256 data transitions.
72 This is the maximum data transition consumed by DPA to lock.

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