Intel® Quartus® Prime Standard Edition User Guide: Third-party Synthesis

ID 683796
Date 9/24/2018
Public
Document Table of Contents

1.9.3.3. Input and Output Delays

Specify the input and output delays for the ports of a design in the Input/Output tab of the SCOPE window, or with the define_input_delay and define_output_delay attributes. The Synplify software does not allow you to assign the tCO and tSU values directly to inputs and outputs. However, a tCO value can be inferred by setting an external output delay; a tSU value can be inferred by setting an external input delay.
Relationship Between tCO and the Output Delay
tCO = clock period – external output delay
Relationship Between tSU and the Input Delay
tSU = clock period – external input delay

When the syn_forward_io_constraints attribute is set to 1, the Synplify software passes the external input and output delays to the Intel® Quartus® Prime software using NativeLink integration. The Intel® Quartus® Prime software then uses the external delays to calculate the maximum system frequency.