Intel® Quartus® Prime Standard Edition User Guide: Third-party Synthesis

ID 683796
Date 9/24/2018
Public
Document Table of Contents

2.2. Design Flow

The following steps describe a basic Intel® Quartus® Prime design flow using the Precision Synthesis software:
  1. Create Verilog HDL or VHDL design files.
  2. Create a project in the Precision Synthesis software that contains the HDL files for your design, select your target device, and set global constraints.
  3. Compile the project in the Precision Synthesis software.
  4. Add specific timing constraints, optimization attributes, and compiler directives to optimize the design during synthesis. With the design analysis and cross-probing capabilities of the Precision Synthesis software, you can identify and improve circuit area and performance issues using prelayout timing estimates.
    Note: For best results, Mentor Graphics recommends specifying constraints that are as close as possible to actual operating requirements. Properly setting clock and I/O constraints, assigning clock domains, and indicating false and multicycle paths guide the synthesis algorithms more accurately toward a suitable solution in the shortest synthesis time.
  5. Synthesize the project in the Precision Synthesis software.
  6. Create an Intel® Quartus® Prime project and import the following files generated by the Precision Synthesis software into the Intel® Quartus® Prime project:
    • The Verilog Quartus Mapping File ( .vqm) netlist
    • Synopsys Design Constraints File (.sdc) for Timing Analyzer constraints
    • Tcl Script Files (.tcl) to set up your Intel® Quartus® Prime project and pass constraints
    Note: If your design uses the Classic Timing Analyzer for timing analysis in the Intel® Quartus® Prime software versions 10.0 and earlier, the Precision Synthesis software generates timing constraints in the Tcl Constraints File (.tcl). If you are using the Intel® Quartus® Prime software versions 10.1 and later, you must use the Timing Analyzer for timing analysis.
  7. After obtaining place-and-route results that meet your requirements, configure or program the Intel device.

You can run the Intel® Quartus® Prime software from within the Precision Synthesis software, or run the Precision Synthesis software using the Intel® Quartus® Prime software.

Figure 9. Design Flow Using the Precision Synthesis Software and Intel® Quartus® Prime Software