CPRI Intel® FPGA IP User Guide

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ID 683595
Date 4/04/2022
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5.16. RX_ERR Register

Table 70.  RX_ERR Register at Offset 0x3C
Bits Field Name Type Value on Reset Description
31:16 Reserved UR0 16'b0
15:8 sh_err RC 8'b0 Number of 64B/66B sync header violations detected in the transceiver. Enables CPRI link debugging. This register turns over to the value of 0 when it increments from the value of 255.
7:0 lcv RC 8'b0 Number of line code violations (LCVs) detected in the 8B/10B decoding block in the transceiver. Enables CPRI link debugging. This register turns over to the value of 0 when it increments from the value of 255.

This counter includes LCVs that occur during initialization.

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