Cyclone V Device Handbook: Volume 2: Transceivers

ID 683586
Date 10/24/2018
Public
Document Table of Contents

1.3.1.4. Transmitter Bit-Slip

The transmitter bit-slip allows you to compensate for the channel-to-channel skew between multiple transmitter channels by slipping the data sent to the PMA. The maximum number of bits slipped is controlled from the FPGA fabric and is equal to the width of the PMA-PCS minus 1.

Table 15.  Bits Slip Allowed with the tx_bitslipboundaryselect signal
Operation Mode Maximum Bit-Slip Setting
Single width (8 or 10 bit) 9
Double width (16 or 20 bit) 19