Cyclone V Device Handbook: Volume 2: Transceivers

ID 683586
Date 10/24/2018
Document Table of Contents

6.5. Reverse Serial Pre-CDR Loopback

This section describes reverse serial pre-CDR loopback debugging with a data path through the rx_serial_data port to the tx_serial_data port, and before the receiver CDR.

You can enable reverse serial pre-CDR loopback through the reconfiguration controller.

Note: For further details, refer to the Altera Transceiver PHY IP Core User Guide.

In reverse serial pre-CDR loopback, the data received through the rx_serial_data port is looped back to the tx_serial_data port before the receiver CDR. The received data is also available to the FPGA logic. No dynamic pin control is available to select or deselect reverse serial pre-CDR loopback.

The transmitter buffer is the only active block in the transmitter channel. You can change the VOD on the transmitter buffer through the dynamic reconfiguration controller. The pre-emphasis settings for the transmitter buffer cannot be changed in this configuration.

Figure 112. Reverse Serial Pre-CDR Loopback Datapath