Cyclone V Device Handbook: Volume 2: Transceivers

ID 683586
Date 10/24/2018
Public
Document Table of Contents

1.3.2.1.1. Word Aligner Options and Behaviors

The operation mode and alignment pattern length support varies depending on the word aligner configurations.
Table 17.  Word Aligner Options and Behaviors
PMA-PCS Interface Width (bits) Word Alignment Mode Word Alignment Pattern Length (bits) Word Alignment Behavior
8 Manual Alignment 16 User-controlled signal starts the alignment process. Alignment happens once unless the signal is reasserted.
Bit-Slip 16 User-controlled signal shifts data one bit at a time.
10 Manual Alignment 7 and 10 User-controlled signal starts the alignment process. Alignment happens once unless the signal is reasserted.
Bit-Slip 7 and 10 User-controlled signal shifts data one bit at a time.
Automatic Synchronized State Machine 7 and 10 Data is required to be 8B/10B encoded. Aligns to selected word aligner pattern when pre-defined conditions are satisfied.
Deterministic Latency State Machine 10 User-controlled signal starts the alignment process. After the pattern is found and the word boundary is identified, the state machine controls the deserializer to clock-slip the boundary-indicated number of serial bits.
16 Manual Alignment 8, 16, and 32 Alignment happens automatically after RX PCS reset. User-controlled signal starts the alignment process thereafter. Alignment happens once unless the signal is reasserted.
Bit-Slip 8, 16, and 32 User-controlled signal shifts data one bit at a time.
20 Manual Alignment 7, 10, and 20 Alignment happens automatically after RX PCS reset. User-controlled signal starts the alignment process thereafter. Alignment happens once unless the signal is reasserted.
Bit-Slip 7, 10, and 20 User-controlled signal shifts data one bit at a time.
Deterministic Latency State Machine 10 and 20 User-controlled signal starts the alignment process. After the pattern is found and the word boundary is identified, the state machine controls the deserializer to clock-slip the boundary-indicated number of serial bits.