Cyclone V Device Handbook: Volume 2: Transceivers

ID 683586
Date 10/24/2018
Document Table of Contents

1.5. PLL Sharing

In a Quartus II design, you can merge two different protocol configurations to share the same CMU PLL resources. The protocol configurations and the two CMU PLLs to be merged must fulfill the following conditions:

  • The transceiver channels must fit in the same transceiver bank.
  • The CMU PLLs must have identical configurations, with identical output frequencies.
  • The CMU PLLs must share a common REFCLK input.
  • The CMU PLLs must share a common reset input.

Do not merge a CMU PLL with one that is used for PCI Express. The PCIe Hard IP needs complete control of the CMU PLL and its reset for compliance.