Intel® Quartus® Prime Standard Edition User Guide: Debug Tools

ID 683552
Date 9/24/2018
Public
Document Table of Contents

3.11. User Interface Settings Reference

The Transceiver Toolkit user interface contains the following settings:

Table 41.  Transceiver Toolkit Control Pane SettingsSettings in alphabetical order. All the settings appear in the Transceiver Link control pane.
Setting Description Device Families Control Pane
Alias Name you choose for the channel. All supported device families

Transmitter pane

Receiver pane

Auto Sweep status Reports the current and best tested bits, errors, bit error rate, and case count for the current Auto Sweep test. All supported device families Receiver pane
Bit error rate (BER) Reports the number of errors divided by bits tested since the last reset of the checker. All supported device families Receiver pane
Channel address Logical address number of the transceiver channel. All supported device families

Transmitter pane

Receiver pane

Data rate

Data rate of the channel that appears in the project file, or data rate the frequency detector measures.

To use the frequency detector, turn on Enable Frequency Counter in the Data Pattern Checker IP core or Data Pattern Generator IP core, regenerate the IP cores, and recompile the design.

The measured data rate depends on the Avalon® management clock frequency that appears in the project file.

If you make changes to your settings and want to sample the data rate again, click the Refresh button next to the Data rate

All supported device families

Transmitter pane

Receiver pane

DC gain Provides an equal boost to the incoming signal across the frequency spectrum. All supported device families Receiver pane
DFE mode

Decision feedback equalization (DFE) for improving signal quality.

Device Value
Stratix® V 1-5
Intel® Arria® 10 1-11

In Stratix® V devices DFE modes are Off, Manual, One-time adaptive mode and Adaptation Enabled. Adaptation Enabled mode DFE automatically tries to find the best tap values.

In Intel® Arria® 10 devices, DFE modes are Off, Manual and Adaptation Enabled. DFE in Adaptation Enabled mode automatically tries to find the best tap values.

Stratix® V

Intel® Arria® 10
Receiver pane
Enable word aligner Forces the transceiver channel to align to the word you specify. Stratix® V Receiver pane
Equalization control

Boosts the high-frequency gain of the incoming signal to compensate for the low-pass filter effects of the physical medium. When you use this option with DFE, use DFE in Manual or Adaptation Enabled mode.

In Stratix® V devices, auto sweep supports AEQ one-time adaptation.

All supported device families Receiver pane
Equalization mode

For Intel® Arria® 10 devices, you can set Equalization Mode to Manual or Triggered.

In Stratix® V devices, Adaptive equalization (AEQ) automatically evaluates and selects the best combination of equalizer settings, and turns off Equalization Control. The one-time selection determines the best setting and stops searching. You can use AEQ for multiple, independently controlled receiver channels.

All supported device families Receiver pane
Error rate limit

Turns on or off error rate limits. Start checking after specifies the number of bits the toolkit waits before looking at the bit error rate (BER) for the next two checks.

Bit error rate achieves below sets upper bit error rate limits. If the error rate is better than the set error rate, the test ends.

Bit error rate exceeds sets lower bit error rate limits. If the error rate is worse than the set error rate, the test ends.

All supported device families Receiver pane
Generator/Checker mode

Specifies Data pattern checker or Serial bit comparator for BER tests.

If you enable Serial bit comparator the Data Pattern Generator sends the PRBS pattern, but the serial bit comparator checks the pattern.

In Bypass mode, clicking Start begins counting on the Serial bit comparator.

For BER testing:

  • Intel® Arria® 10 devices support the Data Pattern Checker and the Hard PRBS.
  • Stratix® V devices support the Data Pattern Checker and the Serial Bit Checker.
All supported device families

Transmitter pane

Receiver pane

Horizontal phase step interval Specifies the number of horizontal steps to increment when performing a sweep. Increasing the value increases the speed of the test but at a lower resolution. This option only applies to eye contour. Stratix® V

Transmitter pane

Receiver pane

Increase test range

For the selected set of controls, increases the span of tests by one unit down for the minimum, and one unit up for the maximum.

You can span either PMA Analog controls (non-DFE controls), or the DFE controls. You can quickly set up a test to check if any PMA setting combinations near your current best yields better results.

To use, right-click the Advanced panel

All supported device families Receiver pane
Inject Error Flips one bit to the output of the data pattern generator to introduce an artificial error. Stratix® V Transmitter pane
Maximum tested bits Sets the maximum number of bits tested for each test iteration. All supported device families Receiver pane
Number of bits tested Specifies the number of bits tested since the last reset of the checker. All supported device families Receiver pane
Number of error bits Specifies the number of error bits encountered since the last reset of the checker. All supported device families Receiver pane
Number of preamble beats Number of clock cycles to which the preamble word is sent before the test pattern begins. Stratix® V Transmitter pane
PLL refclk freq Channel reference clock frequency that appears in the project file, or reference clock frequency calculated from the measured data rate. All supported device families

Transmitter pane

Receiver pane

Populate with Right-click the Advanced panel to load current values on the device as a starting point, or initially load the best settings auto sweep determines. The Intel® Quartus® Prime software automatically applies the values you specify in the drop-down lists for the Transmitter settings and Receiver settings. All supported device families Receiver pane
Preamble word Word to send out if you use the preamble mode (only if you use soft PRBS Data Pattern Generator and Checker). All supported device families Transmitter pane
Pre-emphasis

This programmable module boosts high frequencies in the transmit data for each transmit buffer signal. This action counteracts possible attenuation in the transmission media.

( Stratix® V only) Using pre-emphasis can maximize the data eye opening at the far-end receiver.

All supported device families Transmitter pane
Receiver channel Specifies the name of the selected receiver channel. All supported device families Receiver pane
Refresh Button After loading the .pof file, loads fresh settings from the registers after running dynamic reconfiguration. All supported device families

Transmitter pane

Receiver pane

Reset Resets the current test. All supported device families Receiver pane
Rules Based Configuration (RBC) validity checking

Displays in red any invalid combination of settings for each list under Transmitter settings and Receiver settings, based on previous settings.

When you enable this option, the settings appear in red to indicate the current combination is invalid. This action avoids manually testing invalid settings that you cannot compile for your design, and prevents setting the device into an invalid mode for extended periods of time and potentially damaging the circuits.

All supported device families

Receiver pane
Run length Sets coverage parameters for test runs. All supported device families

Transmitter pane

Receiver pane

RX CDR PLL status 5 Shows the receiver in lock-to-reference (LTR) mode. When in auto-mode, if data cannot be locked, this signal alternates in LTD mode if the CDR is locked to data. All supported device families Receiver pane
RX CDR data status Shows the receiver in lock-to-data (LTD) mode. When in auto-mode, if data cannot be locked, the signal stays high when locked to data and never switches. All supported device families Receiver pane
Serial loopback enabled Inserts a serial loopback before the buffers, allowing you to form a link on a transmitter and receiver pair on the same physical channel of the device. All supported device families

Transmitter pane

Receiver pane

Start Starts the pattern generator or checker on the channel to verify incoming data. All supported device families

Transmitter pane

Receiver pane

Stop Stops generating patterns and testing the channel. All supported device families

Transmitter pane

Receiver pane

Target bit error rate Finds the contour edge of the bit error rate that you select. This option only applies to eye contour mode. Stratix® V

Transmitter pane

Receiver pane

Test pattern Test pattern sent by the transmitter channel.

The Data Pattern Checker self-aligns both high and low frequency patterns. Use Bypass mode to send user-design data.

Device Family Test Patterns Available
Stratix® V PRBS7, PRBS15, PRBS23, PRBS31, LowFrequency, HighFrequency, and Bypass mode.
Intel® Arria® 10 PRBS9, PRBS15, PRBS23, and PRBS31.
All supported device families

Transmitter pane

Receiver pane

Time limit Specifies the time limit unit and value to have a maximum bounds time limit for each test iteration. All supported device families Receiver
Transmitter channel Specifies the name of the selected transmitter channel. All supported device families Transmitter pane
TX/CMU PLL status Specifies whether the transmitter channel PLL is locked to the reference clock. All supported device families Transmitter pane
Use preamble upon start If turned on, sends the preamble word before the test pattern. If turned off, starts sending the test pattern immediately. All supported device families Transmitter pane
Vertical phase step interval Specify the number of vertical steps to increment when performing a sweep. Increasing the value increases the speed of the test but at a lower resolution. This option only applies to the eye contour. Stratix® V

Transmitter pane

Receiver pane

VOD control Programmable transmitter differential output voltage. All supported device families Transmitter pane
5 For Stratix® V devices, the Phase Frequency Detector (PFD) is inactive in LTD mode. The rx_is_lockedtoref status signal turns on and off randomly, and is not significant in LTD mode.