Intel® Quartus® Prime Standard Edition User Guide: Debug Tools

ID 683552
Date 9/24/2018
Document Table of Contents

1.5. System-Level Debug Fabric

During compilation, the Intel® Quartus® Prime generates the System-Level Debugging Hub to allow multiple instances of debugging tools in a design.

Most Intel FPGA on-chip debugging tools use the JTAG port to control and read-back data from debugging logic and signals under test. The System-Level Debugging Hub manages the sharing of JTAG resources.

Note: For System Console, you explicitly insert debug IP cores into the design to enable debugging.

The System-Level Debugging Hub appears in the project's design hierarchy as sld_hub:sld_hub_inst .