Intel® Quartus® Prime Standard Edition User Guide: Debug Tools

ID 683552
Date 9/24/2018
Document Table of Contents

2.13.2. High Level Flow

  1. Install the DSP Builder for Intel® FPGAs software, so you have the necessary libraries to enable this flow
  2. Build the design using Simulink and the DSP Builder for Intel® FPGAs libraries.
    DSP Builder for Intel® FPGAs helps to convert the Simulink design to HDL
  3. Include Avalon® -MM components in the design (DSP Builder for Intel® FPGAs can port non- Avalon® -MM components)
  4. Include Signals and Control blocks in the design
  5. Separate synthesizable and non-synthesizable logic with boundary blocks.
  6. Integrate the DSP system in Platform Designer (Standard)
  7. Program the Intel FPGA
  8. Interact with the Intel FPGA through the supported MATLAB* API commands.