Intel® Quartus® Prime Standard Edition User Guide: Debug Tools

ID 683552
Date 9/24/2018
Document Table of Contents

2.10.5. Running a Linearity Test

The linearity test determines the linearity of the step sizes of each ADC code. It uses a histogram testing method which requires sinusoidal inputs which are easier to source from signal generators and DACs than other test methods.

When using Linearity test mode, the reference signal must meet specific requirements:

  • The signal source covers the full code range of the ADC. Results improve if the time spent at code end is equivalent, by tuning the reference signal in Scope mode.
  • If you use code ends, ensure that you are not clipping the signal. Look at the signal in Scope mode to see that it does not look flat at the top or bottom. A good practice is to back away from code ends and test a smaller range within the desired operating range of the ADC input signal.
  • Choosing a frequency that is not an integer multiple of the sample rate and buffer size helps to ensure all code bins are filled relatively evenly to the probability density function of a sine wave. If an integer multiple is selected, some bins may be skipped entirely while others are over populated. This makes the tests results invalid. Use the frequency calculator feature to determine a good signal frequency near your desired frequency.

To run a linearity test:

  1. On ADC Channel, select the ADC channel that you plan to test.
  2. Enter the test sample size in Burst Size. Larger samples increase the confidence in the test results.
  3. Click Run.
    • You can stop the test at anytime, as well as click Run again to continue adding to the aggregate data. To start fresh, click Reset after you stop a test. Anytime you change the input signal or channel, you should click Reset so your results are correct for a particular input.
    • There are three graphical views of the data: Histogram view, DNL view, and INL view.
    • From the Raw Data tab, you can export your data as a .csv file.