Intel® Quartus® Prime Standard Edition User Guide: Debug Tools

ID 683552
Date 9/24/2018
Document Table of Contents

5.13. Design Debugging with the Signal Tap Logic Analyzer Revision History

The following revision history applies to this chapter:

Document Version Intel® Quartus® Prime Version Changes
2018.09.24 18.1.0
  • Initial release in Intel Quartus Prime Standard Edition User Guide.
  • Renamed topic: Untappable Signals to Signals Unavailable for Signal Tap Debugging.
2017.11.06 17.1.0
  • Clarified information about the Data Log Pane.
  • Updated Figure: Data Log and renamed to Simple Data Log.
  • Added Figure: Accessing the Advanced Trigger Condition Tab.
2017.05.08 17.0.0
  • Added: Open Standalone Signal Tap Logic Analyzer GUI.
  • Updated figures on Create Signal Tap File from Design Instance(s).
2016.10.31 16.1.0
  • Added: Create SignalTap II File from Design Instance(s).
  • Removed reference to unsupported Talkback feature.
2016.05.03 16.0.0
  • Added: Specifying the Pipeline Factor
  • Added: Comparison Trigger Conditions
2015.11.02 15.1.0 Changed instances of Quartus II to Intel® Quartus® Prime .
2015.05.04 15.0.0 Added content for Floating Point Display Format in table: SignalTap II Logic Analyzer Features and Benefits.
2014.12.15 14.1.0 Updated location of Fitter Settings, Analysis & Synthesis Settings, and Physical Synthesis Optimizations to Compiler Settings.
December 2014 14.1.0
  • Added MAX 10 as supported device.
  • Removed Full Incremental Compilation setting and Post-Fit (Strict) netlist type setting information.
  • Removed outdated GUI images from "Using Incremental Compilation with the SignalTap II Logic Analyzer" section.
June 2014 14.0.0
  • DITA conversion.
  • Replaced MegaWizard Plug-In Manager and Megafunction content with IP Catalog and parameter editor content.
  • Added flows for custom trigger HDL object, Incremental Route with Rapid Recompile, and nested groups with Basic OR.
  • GUI changes: toolbar, drag to zoom, disable/enable instance, trigger log time-stamping.
November 2013 13.1.0 Removed HardCopy material. Added section on using cross-triggering with DS-5 tool and added link to white paper 01198. Added section on remote debugging an Altera SoC and added link to application note 693. Updated support for MEX function.
May 2013 13.0.0
  • Added recommendation to use the state-based flow for segmented buffers with separate trigger conditions, information about Basic OR trigger condition, and hard processor system (HPS) external triggers.
  • Updated “Segmented Buffer” on page 13-17, Conditional Mode on page 13-21, Creating Basic Trigger Conditions on page 13-16, and Using External Triggers on page 13-48.
June 2012 12.0.0 Updated Figure 13–5 on page 13–16 and “Adding Signals to the SignalTap II File” on page 13–10.
November 2011 11.0.1 Template update.

Minor editorial updates.

May 2011 11.0.0 Updated the requirement for the standalone SignalTap II software.
December 2010 10.0.1 Changed to new document template.
July 2010 10.0.0
  • Add new acquisition buffer content to the “View, Analyze, and Use Captured Data” section.
  • Added script sample for generating hexadecimal CRC values in programmed devices.
  • Created cross references to Quartus II Help for duplicated procedural content.
November 2009 9.1.0 No change to content.
March 2009 9.0.0
  • Updated Table 13–1
  • Updated “Using Incremental Compilation with the SignalTap II Logic Analyzer” on page 13–45
  • Added new Figure 13–33
  • Made minor editorial updates
November 2008 8.1.0 Updated for the Quartus II software version 8.1 release:
  • Added new section “Using the Storage Qualifier Feature” on page 14–25
  • Added description of start_store and stop_store commands in section “Trigger Condition Flow Control” on page 14–36
  • Added new section “Runtime Reconfigurable Options” on page 14–63
May 2008 8.0.0 Updated for the Quartus II software version 8.0:
  • Added “Debugging Finite State machines” on page 14-24
  • Documented various GUI usability enhancements, including improvements to the resource estimator, the bus find feature, and the dynamic display updates to the counter and flag resources in the State-based trigger flow control tab
  • Added “Capturing Data Using Segmented Buffers” on page 14–16
  • Added hyperlinks to referenced documents throughout the chapter
  • Minor editorial updates