Intel® Quartus® Prime Standard Edition User Guide: Debug Tools

ID 683552
Date 9/24/2018
Document Table of Contents

6.2. Choosing a Logic Analyzer

The Intel® Quartus® Prime software offers the following two general purpose on-chip debugging tools for debugging a large set of RTL signals from your design:
  • The Signal Tap Logic Analyzer
  • An external logic analyzer, which connects to internal signals in your Intel-supported device by using the Intel® Quartus® Prime LAI
Table 68.  Comparing the Signal Tap Logic Analyzer with the Logic Analyzer Interface
Feature Description Recommended Logic Analyzer
Sample Depth You have access to a wider sample depth with an external logic analyzer. In the Signal Tap Logic Analyzer, the maximum sample depth is set to 128 Kb, which is a device constraint. However, with an external logic analyzer, there are no device constraints, providing you a wider sample depth. LAI
Debugging Timing Issues Using an external logic analyzer provides you with access to a “timing” mode, which enables you to debug combined streams of data. LAI
Performance You frequently have limited routing resources available to place and route when you use the Signal Tap Logic Analyzer with your design. An external logic analyzer adds minimal logic, which removes resource limits on place-and-route. LAI
Triggering Capability The Signal Tap Logic Analyzer offers triggering capabilities that are comparable to external logic analyzers. LAI or Signal Tap
Use of Output Pins Using the Signal Tap Logic Analyzer, no additional output pins are required. Using an external logic analyzer requires the use of additional output pins. Signal Tap
Acquisition Speed With the Signal Tap Logic Analyzer, you can acquire data at speeds of over 200 MHz. You can achieve the same acquisition speeds with an external logic analyzer; however, you must consider signal integrity issues. Signal Tap

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