Intel® Quartus® Prime Standard Edition User Guide: Debug Tools

ID 683552
Date 9/24/2018
Document Table of Contents Using the Custom Trigger HDL Object

To define a custom trigger flow:
  1. Select the trigger you want to edit.
  2. Open the Advanced Trigger tab by selecting Advanced in the Trigger Conditions drop-down menu.
  3. Add to your project the HDL source file that contains the trigger module using the Project Navigator.
    • Alternatively, append the HDL for your trigger module to a source file already included in the project.
    Figure 65. HDL Trigger in the Project Navigator
  4. Implement the inputs and outputs that your Custom Trigger HDL module requires.
  5. Drag in your Custom Trigger HDL object and connect the object’s data input bus and result output bit to the final trigger result.
    Figure 66. Custom Trigger HDL Object
  6. Right-click your Custom Trigger HDL object and configure the object’s properties.
    Figure 67. Configure Object Properties
  7. Compile your design.
  8. Acquire data with Signal Tap using your custom Trigger HDL object.

Verilog HDL Triggers

The following trigger uses configuration bitstream:

module test_trigger
		input acq_clk, reset,
		input[3:0] data_in,
		input[1:0] pattern_in,
		output reg trigger_out
	always @(pattern_in) begin
		case (pattern_in)
				trigger_out = &data_in;
				trigger_out = |data_in;
				trigger_out = 1'b0;
				trigger_out = 1'b1;

This trigger does not have configuration bitstream:

module test_trigger_no_bs
		input acq_clk, reset,
		input[3:0] data_in,
		output reg trigger_out
	assign trigger_out = &data_in;