3.12. Troubleshooting Common Errors
Missing high-speed link pin connections
Check the pin connections to identify high-speed links (tx_p/n and rx_p/n) are missing. When porting an older design to the latest version of the Intel® Quartus® Prime software, make sure that these connections exist after porting.
Ensure that the reset input to the Transceiver Native PHY, Transceiver Reset Controller, and ATX PLL Intel® FPGA IPs is not held active (1'b1). The Transceiver Toolkit highlights in red all the Transceiver Native PHY channels that you are setting up.
You must connect and drive the reconfig_clk input to the Transceiver Native PHY and ATX PLL Intel® FPGA IPs. Otherwise, the toolkit does not display the transceiver link channel.
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