DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/11/2024
Document Table of Contents

6.2.24. Variable-Size Low-Resource Real-Time FFT

This design example is an extension of the Variable-Size Low-Resource FFT design example. This example runs the Variable-Size Low-Resource FFT in Simulink in real time alongside the DSP System Toolbox FFT block. It produces vector scope outputs that are the same (or as near as) from both.

This design example takes care of the faster sample rate needed by the DSP Builder FFT. The setup file chooses a sample rate that is fast enough for calculation but not so fast that it slows down the simulation unnecessarily. The design also adds buffering to the original MATLAB fft signal path to make the signal processing delays the same in both paths.

The model file is demo_dspba_ex_fft_tut.mdl.