DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/11/2024
Document Table of Contents NCO Block Phase Increment and Inversion

The Phase Increment and Inversion parameter allows you to specify the phase increment values that control the frequencies of the sinusoidal wave signals generated during simulation. You can also specify whether to invert the generated sinusoidal signals. This parameter is closely related to the Output Rate per Channel and the Accumulator Bit Width parameters.

To achieve a desired frequency (in MHz) from the NCO block, you must specify a phase increment value defined by:

Phase Increment Value = Frequency * 2Accumulator Bit Width / Output Data Rate

This value must fall within the range specified by the Accumulator Bit Width parameter. For example, for an accumulator bit width of 24 bits, you can specify a phase increment value less than 224.

You can specify the phase increment values in a vector format that generates multichannel sinusoidal signals. The length of the vector determines how many channels (frequencies) of data are generated from the NCO block. For example, a length of 4 implies that four channels of data are generated.

When the design uses the NCO for super-rate applications (NCO frequency is higher than output data rate), for example direct RF DUC, use multiple channels (in evenly distributed phases). The phase increment value is:

Phase increment value = 
mod((frequency)/(output data rate), 1)×2accumulator bit width

The modulus function limits the phase value to less than 1 and prevents interfering with the inversion bits.

When the input is in matrix format (with multiple rows of vectors), the design configures the NCO block as a multi-bank NCO for frequency hopping for multicarrier designs. The number of rows in the matrix represents the number of banks of frequencies (of sine and cosine waves) that generate for a given channel. An additional bank input and b output port automatically add to the NCO block.

Note: No upper limit to the number of rows exists in the matrix and you can specify any number of frequency banks. However, you should carefully monitor the resource usage to ensure that the specified design fits into the target device.

You can also use the Phase Increment and Inversion parameter to indicate whether the generated sinusoidal signals are inverted. For an accumulator width in bits of 24 bits, you can add two bits (the 25th and 26th bits) to the phase increment value for a given frequency. These bits indicate if the sine (26th bit) and cosine (25th bit) are inverted.