DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/11/2024
Document Table of Contents

6.13.14. Hybrid Direct Form and Transpose Form FIR Filter

The design example uses small, four-tap direct form filters to use the structure inside the DSP block efficiently. The design example combines these direct form minifilters into a transpose structure, which minimizes the logic and memory that the sample pipe uses. This FIR filter shows a FIR architecture that is a hybrid between the direct form and transpose form FIR filter. It combines the advantages of both.

The model file is demo_hybrid_fir_mc.mdl.