DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/11/2024
Document Table of Contents

6.13.4. Bit Extract for Boolean Vectors

This design example demonstrates different ways to use the BitExtract block to split a wide signal into a vector of narrow signal components.

This block converts a scalar signal into a vector of Boolean signals. You use the initialization parameter to arbitrarily order the components of the vector output by the BitExtract block. If the input to a BitExtract block is a vector, different bits can be extracted from each of the components. The output does not always have to be a vector of Boolean signals. You may split a 16-bit wide signal into four components each 4-bits wide.

The model file is demo_bitextract.mdl.