DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/11/2024
Public
Document Table of Contents

3.2.2.1. dspba.runModelsimATB

Use this command to run RTL simulation tests.

The dspba.runModelsimATB command has the following syntax:

dspba.runModelsimATB('model', 'entity', ['rtl_path']);

where:

  • model = design name (without extension, in single quotes)
  • entity = entity to test (the name of a Primitive subsystem or a ModelIP block, in single quotes)
  • rtl_path = optional path to the generated RTL (in single quotes, if not specified the path is read from the Control block in your model)

For example:

dspba.runModelsimATB('demo_fft16_radix2', 'FFTChip');

The return values are in the format [pass, status, result] where:

  • pass = 1 for success, or 0 for failure
  • status = should be 0
  • result = should be a string such as:

    "# ** Note: Arrived at end of stimulus data on clk <clock name>"

DSP Builder writes an output file with the full path to the component under test in the working directory. DSP Builder creates a new file with an automatically incremented suffix each time the testbench is run. For example:

demo_fft_radix2_DUT_FFTChip_atb.6.out

This output file includes the ModelSim transcript and is useful for debugging if you encounter any errors.