DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/11/2024
Document Table of Contents

1.6. DSP Design Flow in FPGAs

Traditionally, system engineers use a hardware flow based on an HDL, such as Verilog HDL or VHDL, to implement DSP systems in FPGAs. Intel tools such as DSP Builder, enable you to follow a software-based design flow while targeting FPGAs. DSP Builder for Intel® FPGAs simplifies hardware implementation of DSP functions, provides a system-level verification tool to the system engineer who is not necessarily familiar with HDL design flow, and allows the system engineer to implement DSP functions in FPGAs without learning HDL. DSP Builder for Intel® FPGAs provides an interface from Simulink directly to the FPGA hardware. Additionally, you can incorporate the designs created by DSP Builder for Intel® FPGAs into a Platform Designer system for a complete DSP system implementation.