DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 4/01/2024
Document Table of Contents

14.6.1. Anchored Delay

DSP Builder SampleDelay blocks are often not suitable in FSMs, which are common in control unit designs. To ensure that DSP Builder's simulation of finite state machines (FSMs) matches the synthesized hardware, use the Anchored Delay block not the SampleDelay block.

The Anchored Delay block has a data input and a valid input port. Connect the valid input port to the valid in of the enclosing Primitive subsystem to allow DSP Builder to correctly schedule the starting state of your control unit design.