DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/11/2024
Public
Document Table of Contents

3.2.2.4. Testbench Error Messages

Typical error messages have the following form:

# ** Error (vcom-13) Recompile <path>altera_mf.altera_mf_components because <path>iee.std_logic_1164 has changed.

...

# ** Error: <path>mdl_name_system_subsystem_component.vhd(30): (vcom-1195) Cannot find expanded name: 'altera_mf.altera_mf_components'.

...

# ** Error: <path>vcom failed.

...

# At least one module failed to compile, not starting simulation.

These errors may occur when a ModelSim precompiled model is out of date, but not automatically recompiled. A similar problem may occur after making design changes when ModelSim has cached a previously compiled model for a component and does not detect when it changes. In either of these cases, delete the rtl directory, resimulate your design and run the dspba.runModelsimATB or run_all_atbs command again.

If you run the Quartus Prime Fitter, the command also reports whether the design achieves the target fMAX. For example:

Met FMax Requirement (FMax(291.04) >= Required(200))

A summary also writes to a file results.txt in the current working directory. For example:

Starting demo_agc Tests at 2009-01-23 14:58:48

demo_agc: demo_agc/AGC_Chip/AGC hardware matches simulation (atb#1):

PASSED

demo_agc: Quartus Prime compilation was successful.

(Directory=../quartus_demo_agc_AGC_Chip_2): PASSED

demo_agc: Met FMax Requirement (FMax(291.04) >= Required(200)):

PASSED

Finished demo_agc Tests at 2009-01-23 15:01:59 (3 Tests, 3 Passes, 0 Skipped, 0 Failed (fmax), 0 Failed (non-fmax))