Intel® Arria® 10 Avalon® Streaming with SR-IOV IP for PCIe* User Guide

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ID 683686
Date 1/11/2022
Public
Document Table of Contents

A.2. TLP Packet Formats with Data Payload

Figure 66. Memory Write Request, 32-Bit Addressing
Figure 67. Memory Write Request, 64-Bit Addressing
Figure 68. Configuration Write Request Root Port (Type 1)
Figure 69. I/O Write Request
Figure 70. Completion with Data
Figure 71. Completion Locked with Data
Figure 72. Message with Data

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