Arria® 10 Avalon® Streaming with SR-IOV IP for PCIe* User Guide

ID 683686
Date 9/12/2024
Public
Document Table of Contents

12.1.3. Viewing the Important PIPE Interface Signals

You can view the most important PIPE interface signals, txdata, txdatak, rxdata, and rxdatak at the following level of the design hierarchy: altpcie_<device>_hip_pipen1b|twentynm_hssi_<gen>_<lanes>_pcie_hip.