Intel® Arria® 10 Avalon® Streaming with SR-IOV IP for PCIe* User Guide

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ID 683686
Date 1/11/2022
Public
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6.10. Uncorrectable Error Mask Register

Table 67.  Uncorrectable Error Mask Register - 0x108

Bits

Register Description

Default Value

Access

[31:21]

Reserved

0

RO

[20] When set, masks an Unsupported Request Received 0

RW

[19] When set, masks an ECRC Error Detected 0

RW

[18] When set, masks a Malformed TLP Received 0

RW

[17] When set, masks Receiver Overflow 0

RW

[16]

When set, masks an unexpected Completion was received

0

RW

[15]

When set, masks a Completer Abort (CA) was transmitted

0

RW

[14]

When set, masks a Completion Timeout

0

RW

[13]

When set, masks a Flow Control protocol error

0

RW

[12]

When set, masks that a poisoned TLP was received

0

RW

[11:5]

Reserved

0

RO

[4]

When set, masks a Data Link Protocol error

0

RW

[3:0]

Reserved

0

RO

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