Intel® Arria® 10 Avalon® Streaming with SR-IOV IP for PCIe* User Guide

Download
ID 683686
Date 1/11/2022
Public
Document Table of Contents

9.4.4. PIPE

The PIPE interface implements the Intel‑designed PIPE interface specification. You can use this parallel interface to speed simulation; however, you cannot use the PIPE interface in actual hardware.

  • The simulation models support PIPE and serial simulation.
  • For Gen3, the Intel BFM bypasses Gen3 Phase 2 and Phase 3 Equalization. However, Gen3 variants can perform Phase 2 and Phase 3 equalization if instructed by a third-party BFM.

Did you find the information on this page useful?

Characters remaining:

Feedback Message